The present inventive concepts relate to a semiconductor device and/or a method of manufacturing the same.
Research into a process of simultaneously manufacturing a cell element and a logic element in a flash memory device has been conducted. In forming a logic element together with a memory cell element in a flash memory device, research into methods of forming a logic element operating at a low voltage by using a high-k film and a metal gate in order to substantially prevent or reduce a gate leakage phenomenon that may occur in the logic element operating at a low voltage is ongoing.
In the case of forming a gate structure using a high-k film and a metal gate, the occurrence of the gate leakage phenomenon in the logic element operating at a low voltage may be substantially prevented or reduced. On the other hand, in the case that a memory cell element has a split gate structure, a flash memory device may be inappropriately operated due to a short phenomenon in which an erase gate and a select gate are electrically connected to each other by a metal gate, and a data retention error may occur.